PSAS/ FifoArchitecture

Process/FIFO Software Architecture

Description: The process/FIFO software is a suite of a flight computer software application tasks. It is responsible for all the flight computer requirements, basically handling input/output to CAN and Wireless LAN in accordance with the flight computer state model.

The FIFO architecture consists of a handful of processes each focusing on a specific asynchronous task:

The tasks communicate with each other with named pipes (aka FIFOs), sending fixed-size FIFO message structures. Each task is basically a big loop waiting for things to read on its data source (usually its own FIFO, but can be the can device for can_rdr or the net device for net2fc). Processes open another process' FIFO and write a message into it in order to communicate to the other process. FIFO messages include raw can messages, system state information, interesting conditions, miscellaneous strings, and the like.

Source code: is at http://cvs.psas.pdx.edu in the c/fcfifo directory, with library functions in the c/ltc-fc-common directory and Linux CAN driver in the c/can-linux directory.

History: The FIFO architecture replaced the earlier Can Muxer and Renegade architectures, which didn't get as far in implementation of the rocket application.

Pros: The main advantage to the process/fifo architecture seems to be ease of initial implementation and debugging.

Cons: The weakness to this model includes:

Compare with BlackboardArchitecture.

-- ?JamesPerkins - 08 Oct 2003