The Mission

Andrew says, "Do a giant 'bullshit alert' on the microcontrollers." Scan the datasheets for gotchas, vague sections, and anything that looks weird.

Things to Look for

* fast flash

the process type (e.g. 0.1u process)
power consumption
Serial boot (also known as UART boot, ROM boot, and boot loader)
wait states on the memory (1 wait state means you lose one clock cycle)
PLL
real time clock
has eCos been ported to it?
drivers
software tools support (and what license is it under)
internal interrupt handling
clock generation - how many PLLs will we use
internal voltage regulators - we want to avoid them
memory read speeds and widths
ADC speed - need at least 2.5KHz on each channel (not total)
pin tradeoffs - what do we need and what do we have to give up to get it?
how long to bring up internal oscillators?
5V tolerance on GPIO

Main Issues

Clock Issues

The chip requires a precise 48MHz clock. There's basically two choices for generating that clock: feed in the 48MHz directly, or use a slower clock and one of the internal PLLs to multiply the input. PLL2 is the only PLL that connects with the USB clock. PLL2 can only multiply by 12, which means it needs a 4MHz clock. So the choices are a 48MHz or a 4MHz clock for USB; the 4MHz clock might be best for harmonic reduction. The 144 pin version has a pin to bring out the core clock (CKOUT), but it's missing from the 64 pin version.

Now, onto PLL1, which controls the main core frequency. It can multiply by 12, 16, 20, or 24. It can also divide by any number from 1 to 7. The input to PLL1, CLK, can be divided by one or two before it even reaches PLL1. The output from PLL1 can be divided by 1, 2, 4, or 8 before it gets to the core, memories, and peripherals. We want to get the max frequency we can get out of the chip (66MHz). There might be some wait state issues with memory, but we'll ignore that for now.

Core frequency equation:

Fc = 4MHz * CLKd * PLL1m * PLL1d * PLL1outd <= 66MHz

where

CLKd = {1, 1/2}

PLL1m = {12, 16, 20, 24}

PLL1d = {1, 1/2, 1/3, 1/4, 1/5, 1/6, 1/7}

PLL1outd = {1, 1/2, 1/4, 1/8}

With a PLL1 multiplier of 16 and no dividing, we get a 64MHz clock. It's probably the closest, although perhaps someone should run it through an equation solver. The next lowest clock would be 48MHz (by choosing a PLL1 multiplier of 12).

To generate the two required clocks, we end up using both PLLs. It would be great to run the chip at 48MHz and route the output of PLL1 to the USB clock, but that doesn't seem to be possible. According to the datasheet, the USB can only be clocked externally or through PLL2, so we're stuck using the two PLLs.

Voltage Regulator Issues

Tim thinks the internal voltage regulator isn't going to be as efficient as our external switching power supply. The datasheet states you can turn off the internal voltage regulator, but it's not as simple as it seems.

V18BKP is where we would attach our 1.8V external power supply. V18 is supposed to be an external 1.8V reference, and it's "not supported" to hook the external power supply to it. Looking at the diagram, it appears that when the chip enters standby mode, V18BKP is disconnected from the core and the Low Power Voltage Regulator takes over. We really don't want that behavior.

However, the text and the block diagram disagree (or at least confuse). After mentioning that the LPVR supplies power during standby mode, the datasheet states, "It is possible to bypass the Low Power Voltage Regulator under software control when an external 1.8V supply (V18BKP) is available in addition to V33..." The question is, can it be bypassed in Standby mode?

In any case, the datasheet is confusing enough to make us wonder.

USB

The USB documentation seems to be lacking. It also seems bad that only "bulk transfer, isochronous transfers and USB Suspend/Resume functions" are mentioned in the datasheet. What about other control transfers and interrupt transfers? It doesn't seem like they have any interrupt endpoints.

Oscillator Issues

The internal oscillator takes 2.5 seconds to start up. Why does it take so long?

ADC Issues

The four ADC channels can only convert at 1KHz. Jamey says the IMU was sampling at 2.5KHz before, so this could be an issue.

Notes

The Application Notes for the STR71x family might be interesting to look at.

There are two 1.8 voltage regulators (whether they meet Tim's spec is another story). Note that the "main" voltage regulator is turned off in low power mode. The RTC can still run in Standby mode when it's powered by the low power voltage regulator.

If the internal 1.8V supply drops below a certain threshold, the Low Voltage Detector will reset the chip. Can we turn this off if we're using an external 1.8V supply? Both voltage supplies can be switched off through software. Careful attention should be paid to pages 4 and 5 of application note 10332 (hardware development). Looks like there could be some funkiness there.

The RTC needs an external 32kHz crystal (Glenn says we can get a very small one). The USB clock can be powered by one of the microcontroller's internal PLL pins, otherwise we need a 48MHz external clock.

The internal oscillator takes 2.5 seconds to start up. Seems like a long time?

USB is full speed (12Mbs). 16 bidirectional or 32 unidirectional endpoints. The introduction says it supports "bulk transfer, isochronous transfers and USB Suspend/Resume functions." Note the non-existent mention of interrupt and control transfers.

Only three of the 16-bit timers are brought out externally. The fourth can only be used by the application software. Also, one of the three timers brought out externally shares pins with the four ADC inputs. So if we want an ADC, we have to sacrifice an external timer. Can we use the external timers internally for software?

No external memory interface (EMI), not that we need it.

ADC converts in single-shot or round robin mode, up to 1kHz (which may be slow for the IMU). Input range is 0-2.5V (what range are we looking for?). [Typical A/D ranges are 0-2.5 or 0-5, even -5 to +5; Input signal conditioning takes care of non standard voltages, so this range should be fine. - Glenn]

Cool stuff

Five power saving modes (SLOW, WAIT, LPWAIT, STOP, and STANDBY).

Zero wait states for flash (at 33MHz).

Useful Datasheets

Attachments: