PSAS/ capstone2009/ design/ aps

Battery Sensor Requirements

  • MUST monitor charge ("coulomb counter")
  • MUST measure pack voltage
  • SHOULD: monitor the voltage on each cell
  • MUST monitor battery pack temperature (MUST be compatible with charging chip)
  • SHOULD separate high current connector from sensing connector
  • (Note: The battery pack we use is 4-cells in series and 2-cells in parallel.)

Battery Sensor Research

Initial research into battery sensor IC on Digi-key website shows that there are three companies making the chips: Texas Instruments, Dallas Semiconductor/Maxim-ic, and Microchip Technology. We also looked at Fairchild and Intersil. TI and Microchip technology don't have any chip that monitor a 4-cell Li-ion Battery. The only chip that works with 1-10 cell Li-ion Battery is DS2788 from Maxim. Intersil has three chips that might work for monitoring individual cell voltage, which are ISL9208, ISL9216/9717, and ISL94200. All of them use I2C interface:

  • ISL9208: Supports battery pack configurations consisting of 5-cells to 7-cells in series and 1 or more cells in parallel. This is the final chip that we chose because its application note shows that we can also use this chip for 4-cells battery as well.
  • ISL9216/9217: Provides integrated overcurrent protection circuitry, short circuit protection, an internal voltage regulator, internal cell balancing switches, cell voltage level shifters, and drive circuitry for external FET devices that control pack charge and discharge. The load monitor current is (20,40,60)μA and <10μA sleep mode. We didn't choose this chip because we would need to cascade the ISL9216 and ISL9217 to make it work.
  • ISL94200: We didn't choose this chip because it doesn't have the internal cell balancing switches.

In terms of a fuel gage, we chose the Maxim (was Dallas) DS2788. It's the only fuel gauge chip that made sense, we wish we remember why.

Battery Sensor Design

By using the ISL9208 for charge balancing and voltage level shifting and the DS2788 as a charge counter, we get a two chip solution that meets all of our requirements. The only downside is the DS2788 requires a low side shunt (ugh) and has a one wire bus interface (double ugh: what was Maxim thinking?).

This design is thus pretty chip centric, so we'll go over the design by really going over the chip.

ISL9208 battery charge leveling and cell voltage level shifting

The ISL9208 is almost the perfect chip for us, although it is a bit crusty. Here's an application note that's worth reading about it. A few notes on how we're using it:

  • We're only using it for 4 cell series pack.
  • We don't care about the overcurrent protection (OCP) and the over charge protection. We're completely ignoring this feature and not even connecting the FETs; that's what the fuse and the Avionics Power System (APS) power switches (with integrated circuit breaker) are for.
  • We do care about the internal cell balancing switches, that gives us cell balancing. Yay.
    • 200 mA max balance current, with internal IC power dissipation at 400 mW and internal MOSFETs with 5 +/- 2 ohm Rdson
  • We do care about the voltage monitor level shifters, that allows us to use the APS microcontroller to ADC each cell voltage, despite the pack's high voltage.
  • Internal chip and external battery temperature are also a feature, but we'll get the ext. battery temperature from the DS2788.
  • Has sleep mode, < 10 uA draw, so we should use that for sure when the APS is inactive.
  • We're dubious about the external NPN pass transistor for the 3.3V power supply, but it's so simple it'll probably be OK as long as it doesn't suck too much power. This system will DEFINITELY need to be measured for current consumption.


  • The 15 ohm CBAL resistors will toast the chip; choose a better value
  • The voltage drop across the shunt resistor will affect the analog out voltage measurement. Compensate with known current and thus known voltage drop from the DS2788? What's the max/min voltage drop?
  • Come up with register settings for the LPC ISL.
  • Come up with an automated sleep circuit so that the ISL chip goes to sleep when the LPC is asleep/disconnected.



  • Recalculate Rshunt, which drives much of the problems with this board because the diff between sensor board ground and "pack" ground.


  • Measures voltage, temperature, and current,and estimates available capacity for rechargeable lithium-ion (Li+) and Li+ polymer batteries.

  • Cell characteristics and application parameters used in the calculations are stored in on-chip EEPROM. The available capacity registers report a conservative estimate of the amount of charge that can be removed given the current temperature, discharge rate, stored charge, and application parameters. Capacity estimation is reported in mAh remaining and percentage of full.

  • LED display drivers and a debounced input make display of the capacity information easy. The LED pins can directly sink current, requiring only a resistor for setting the current in the LED display, thus reducing space and cost.

Component Selection


LEDs for Fuel-Gauge Display

D3006-D3009 and R3006,R3017,R3022 and R3023

Protection circuits for the input/output data pins.


Sense resistor for the DS2788. With R3007 = 1mOhm, the current resolution is 1.5626uV/1mOhm = 1.5mA,which is good enough for our test.

The resistor I chose is CSNL10.001FRCT-ND(Digi-Key number).

  • Family Chip Resistor - Surface Mount
  • Series CSNL
  • Resistance In Ohms 0.001
  • Power (Watts) 1.5W
  • Tolerance ±1%
  • Lead Style Surface Mount (SMD - SMT)
  • Case 2010 (5025 metric)
  • Packaging Cut Tape (CT)
  • Composition Current Sense, Metal Foil
  • Temperature Coefficient ±50ppm/°C

Q1,Q2, R3008-R3011, C3001

Q1 is a P-channel FET, and Q2 is a N-channel FET. R3008 and R3009 form a voltage divider circuit to provide the right voltage level for VIN pin. R3010 and R3011 forms another voltage divider to provide the right voltage level for Vds of Q1. Before the start of a voltage conversion, VMA is driven high. Then Q2 turns on. As a result, Q1 turns on. Therefore, VIN (the Voltage sense input) will input the voltage, which is one fourth of the total battery pack voltage. At the end of the conversion cycle, the VMA pin is driven low. Then Q1 and Q2 are both off. As a result, VIN doesn't input any voltage data. VMA is the voltage measure active. The capacitor C3001 is used to stabilize voltage change.


Fuse to protect the circuit when the current is too high. The one I chose is 0456030.ER from Littelfuse Inc. The Digi-Key Part Number is 0456030.ER-ND.

  • Series NANO²® 456
  • Current 30A
  • Voltage - Rated 125V
  • Package / Case 0.397" L x 0.123" W x 0.123" H (10.1mm x 3.12mm x 3.12mm)
  • Fuse Type Fast Acting, Short Time Lag
  • Mounting Type Holder/Surface Mount
  • Other Names 456030.00


Series resistors on each of the cell inputs to reduce the initial current surge through the ISL9208 inputs. From the application node, a series resistance of 15Ohms will add about 1mV of error to the cell voltage reading, which is acceptable.


Sense resistor of ISL9208 to monitor the change and discharge current. From example 1 of the application note, if the desired over-current level = 8A, and desired short circuit current level = 17A, then the ratio = 17/8 = 2.125. From the table 3, the short circuit threshold is 0.2V and the over-current threshold is 0.10V. The value of the sense resistor = 0.1V/8A = 12.5mOhm.

The resistor I chose is ERJ-B1CJR012U-ND(Digit-Key part number).

  • Family Chip Resistor - Surface Mount
  • Series ERJ
  • Resistance In Ohms 0.012
  • Power (Watts) 1W
  • Tolerance ±5%
  • Lead Style Surface Mount (SMD - SMT)
  • Case 2010 (5025 metric)
  • Packaging Tape & Reel (TR)
  • Composition Thick Film
  • Temperature Coefficient ±350ppm/°C

R3018 and TR3001

The fixed resistor and the thermistor forms a voltage divider. The TEMPI pin inputs the voltage across the thermistor to determine the temperature of the cells.Then the TEMPI pin drops below TEMP3V/13, an external over-temperature condition exists. Therefore, the resister value needs to be 12 times as the resistance of the thermistor. Since the thermistor we chose has resistance of 10k at 25 Celsius, the value of R3018 is 120Kohm.

The thermistor I chose is NTCS0805E3103JMT by Vishay/BC Components. The Digi-key part number is BC2292CT-ND.

  • Family Thermistors - NTC
  • Series 2381
  • Resistance in Ohms @ 25°C 10K
  • B25/85 3570K
  • Operating Temperature -40°C ~ 150°C
  • Resistance Tolerance 5%
  • Value Tolerance 3%
  • Power - Max 210m;
  • Mounting Type PCB, Surface Mount
  • Package / Case 0805 (2012 metric)

T1, C3002 and R3019

T1 is an NPN transistor. The RGO pin connects the emitter of T1 and works in conjunction with the RGC pin to provide a regulated 3.3V. The RGC connects to the base of T1 and provides the control signal for the external transistor to provide the 3.3V regulated voltage on the RGO pin. R3019 is a pull-up resistor, and C3002 is used to stable the voltage changes.

R3020 and R3021

These two resistors control the wake-up threshold of the ISL9208. Their values are calculated using the EQ.1 in the application node. If the wake-up threshold is 3.8V, and the maximum voltage of each cell is 5 and we have a four-cell battery, then R2/(R1+R2) < 0.19. Since R1 determines the current consumption of the circuit, first choose the R1 value as the highest value that is reasonable to use. Let R1 = 1.2Mohm, then R2 = 281.5Kohm. Therefore, I chose R2 = 280Kohm.

Posted Mon Jan 26 02:05:08 2009

AV2b Battery Pack

Battery Pack Requirements

  • SHOULD be a 4-series cell Li battery
  • Battery SHOULD cost <500$
  • Overall Battery SHOULD have energy-mass density (100,,)
  • Overall Battery energy-volume density SHOULD be (200,,)
  • Battery capacity SHOULD be (4,8,) AHr (TODO: TBD on new power budget)
  • SHOULD have dimensions less than (,3.0,3.5) inches in the cross sectional plane of the airframe, length (,,10)inches
  • MUST have a fuse in the pack before the lead
  • Total battery "unplugged" leakage MUST be < C/(1,5,) year rate (e.g. ~ 100 uA for 4 AHr)

Predicted power usage:

Module Current (A)
Flight computer 0.516
GPS: 0.242
ATV: 1.546
transitors: 0.003
APS-can node 0.047
IMU: 0.095
TOTAL 2.4494

Battery Pack Info

We're using a 4S2P pack of "AA Portable Power Corp" PL-5467100-2C (2.75,3.7,4.2) V at 4.250 AHr Li-polymer cell.

This gives us a (11.0,14.8,16.8)V at 8.25 AHr battery pack.

Battery Research

Battery Packs

found prior to adjustment to requirements on 1/30/09

model: PQ-1600LP-4S
capacity: 1.6 Ah
weight: 146 grams
dimensions:  3.03 | 1.46 | 1.3002
price: $65.99
distributer: <>

model: LP-TP2000-4SPL
capacity: 2 Ah
weight: 159.9 grams
dimensions: 2.561 | 1.97 | .99
price: $98.99
distributer: <>

found after adjustments in dimensions on 1/30/09

capacity: 4.25 Ah
voltage: 14.8 V
dimensions: 5.83 | 1.85 | 1.22
weight: 402 grams
energy density:  156.47
price $136.25
distributer: <>

Poly Rc
model: PQ-4350XP-4S
capacity: 4.35 Ah
voltage: 14.8 V
dimensions: 6.5 | 1.8 | 1.3
weight: 436 grams
energy density:  147.66
price: $196.99
distributer: <>

Thunder Power
model: TP4600-4SXL 
capacity: 4.6 Ah
voltage: 14.8V
dimensions: 7.6 | 1.81 | .95
weight: 457 grams
energy density: 148.97
price: $161.24
distributer: <>

model: PQ-5350LP-4S
capacity: 5.35 Ah
voltage: 14.8V
dimensions: 5.56 | 1.82 | 1.58 
weight: 469 grams
energy density: 168.83
price: $180.50
distributer: <>


Manufacturer Model Capacity (Ahr) @ rate Voltage X Y Z Weight (g) En. Dens. Cost Distributor
Tenergy 30512 4 15C 3.7 5.30 1.77 0.26 85 $51.99 link
Tenergy 30502 1.25 10C 3.7 2.56 1.38 0.22 28 $19.99 link
Panasonic CGA103450A 1.95 1C 3.7 1.97 1.34 0.42 39 $13.00 link
sanyo UF103450P 1.88 1C 3.7 1.95 1.34 0.37 38.5 180 Wh/kg $18.34 link PL-896474-2C 5 2C 3.7 2.92 2.52 0.35 95 185 Wh/kg $24.95 link PL-875055-2C 2.5 2C 3.7 2.17 1.97 0.34 51 181 Wh/kg $13.95 link PL-9059156-1C 10 1C 3.7 6.15 2.32 0.35 196 204 Wh/kg $32.95 link L-5467100-2C 4.25 2C 3.7 3.94 2.64 0.22 85 185 Wh/kg $19.95 link


456 series
Littelfuse | <> 
Ferraz Shawmut | <>
Posted Mon Jan 26 02:05:08 2009

Requirements for APS State Machine

  • State Machine should have its own task in freertos

    • Listen for critical inputs
    • check current state and data
    • determine whether to change state or remain in current state
  • Current states:

    • Sleep
    • Wake
    • Safe
    • Armed
  • Sub-functions in State Task will perform internal tasks

    APS must have different states

  • Sleep Mode

  • Wake Mode
  • Safe Mode
  • Armed Mode

Sleep Mode

  • Powered off
  • Able to be powered up by remote signal
  • Very low current draw on battery

Wake Mode

  • Powered up
  • Check of systems, environment
  • Initializations

Safe Mode

  • Initialization complete
  • External system communication normal
  • Ready for armed state
  • Physically locked out of armed state by ground pin or other device

Armed Mode

  • Ready for launch
  • Crew safety top priority
    • Keep safety margins
    • All work should be remote

Testing Algorithm for APS State Machine

Pseudocode for rough draft of APS state machine

enum aps_state //easier to use real names when referring to states

  • sleep = 0
  • wake
  • safe
  • armed

variable rocket_mode = sleep //could init into other state if desired

task apssm_task

  • get data from environment checklist

    • change state depending on data //for demo, use buttons

    • if button 1 triggered

      • switch rocket_mode

        • case sleep: rocket_mode++, output new mode to serial

        • case wake: rocket_mode++, output new mode to serial

        • case safe: rocket_mode++, output new mode to serial

        • case armed: rocket_mode = sleep, output new mode to serial

      • end switch

    • if button 2 triggered

      • rocket_mode = sleep //simulate reset sequence

      • output 'reset event' and new mode to serial

  • keep looping apssm_task

Error Handling

  • Error levels
    • Error levels are implemented as a prefix of the error message.
  • Error Logs
    • The error log is held as a global-scope array of plain text, accessible by all tasks
  • Error messages
    • Error messages are in the format [prefix][message][unique detail]
    • Error messages are the responsibility of the function observing the error.
      • Functions must report error messages in the correct format
      • Functions must report error messages 127 characters or less, and end with a string terminator (null byte)

Serial console

  • Request error logs
    • Listens to incoming traffic on UART, on receipt of keyword "errors" responds with a dump of error log
  • Checking registers
    • Stub code in place for this and additional UART command functionality

Battery Management

  • Read battery voltages and currents
  • Pack voltage
  • Cell voltage
  • Charge counting into capture timer (charge, calculate amps = charge/delta_T)
  • Never turned off unless disconnected


  • Monitor shore power
  • Rocket Ready signal, SAFETY CRITICAL
  • Relays will prevent launch if there are problems
  • Any node can give the Scrub Launch signal

Over current monitoring and “circuit breaker” functionality

  • All sensors, power supplies (pyro, sps, etc.), communication checks needed before cleared for launch
Posted Mon Jan 26 02:05:08 2009


* MUST meet standard lithium charge/discharge safety requirements (thermal, voltage, current, time, fuse)
* MUST be able to charge at (,1C,C/2) rates at internal air temperature of 50 deg C.
* MAY equalize cells up to some small bypass power (e.g., .5W)
* MUST indicate charging status (on/off)
* MAY indicate some kind of charge % (blink rate, color, LED bar graph, etc)

Internal Charger

Final IC Chosen:

Model : LTC 4007

  • Manufacturer: Linear
  • Charge Rate: 4A
  • Datasheet: LT4007

ICs Not Chosen:

Model: MAX8731A

  • Manufacturer: MAXIM
  • Charge Rate: 8A
  • Datasheet: MAX87318

Model: LTC1759

  • Manufacturer: Linear
  • Charge Rate: 8A
  • Datasheet: LTC1759

Model: BQ24705

  • Manufacturer: Texas Instruments
  • Charge Rate: 8A
  • Efficiency: >95%
  • Datasheet: BQ24705

Model: ISL88731A

  • Manufacturer: Intersil
  • Charge Rate: 8A
  • Datasheet: ISL88731A

Model: BQ24751A

  • Manufacturer: Texas Instruments
  • Charge Rate: 10A
  • Efficiency: >95%
  • Datasheet: BQ24751A

Model: BQ24730

  • Manufacturer: Texas Instruments
  • Charge Rate: 20A
  • Datasheet: BQ24730

Model: MAX17005/6/15

  • Manufacturer: Maxim
  • Charge Rate: 5A
  • Datasheet: MAX17005

Model: MAX1909/MAX8725

  • Manufacturer: Maxim
  • Charge Rate: >4A
  • Efficiency: >95%
  • Datasheet: MAX1909/8725


Icharge(max)= ((Vref * 3.01kΩ)/Rprog)-.035V)/Rsense)

Assuming Rprog = 26.7 kΩ, based on needs for C/10 comparator Vref = 1.19 V
Rprog and Vref values from datasheet

Charge is 8.5 A

solving for Rsense we get: Rsense=(1.19V * 3.01kΩ)/26.7kΩ)-.035V)/8.5A) = .15Ω

Parts List

LTC4007 4A Charger

U2101 LTC4357

R2100 Low-pass Resistor used to prevent DC overshoot. Value: 10Ω Value based on previous design calculations. Given we are using the same charger chip; keeping the same value seemed reasonable.

R2101 Referred to Rsense in LTC4007 datasheet Value 1 mΩ Using equation of I2R = P, 8.52(.001) = .07225

R2102,2103 Value: 3.01k Based on LTC4007 datasheet values

R2104,2105,2106,2107,2108,2109,2110 Value: 47k Based on need for PIC in previous design

R2111,2112 The two components added together equal Rprog in LTC4007 datasheet Value: 82.5k Using equation for Rprog, got 82.343k total, previois design had 30.1k and 51.1k, which equals 81.2k , which is close so will add .5k to each to get within range, thus 30.6k and 51.6k respectively.

R2113 Value: 6.04k Based on LTC4007 datasheet

R2114 Value: 309k Using equation found in Rt pin description, gives 2.006 hours timer period, 308k better, but not a standard value.

R2115 Value: 5k Based on value in datasheet, used to calculate Rcl

R2116 Value : .168 ohms Based on 8.5 A current, and equation found in Adaptor limiting section

R2117 Value: 11.8k Located before thermistor

R2118 Value: 13.5k Located in parallel with thermistor

R2119 Value 10k

C2100 Bypass capacitor Value: 15 nF Within range given on ltc4007 charger data sheet

C2101 Value:.12uF Based on value given in ltc4007 charger datasheet

C2102 Value: .0047uF Based on values in LTC charger datasheet

C2103,2104 Value: 20uF Based on values in LTC Charger datasheet diagram

C2105 Value .1uF Based on Value in LTC charger datasheet

C2106 Value: 1.2uF Used equations related to thermistor, found in ltc4007 datasheet, calculated at 1.186 uF Digikey number: 399-3119-2-ND

C2107 Value: 39u Battery board C2108 Value: .1u

C2109 100nF

Q2100 N channel mosfet Model #: STS17NH3LL Operates RDS 50 mOhms at 8.5A

Q2101,2102 P channel mosfet Model# : FQB17P06 Operates 120 mOhms at 8.5A

Q2103 N channel mosfet Model#: STS17NH3LL Operates RDS 50 mOhms at 8.5A Previous model only operated at 4.5A


D2100 Model: MA2Q705 Based on previous charger circuit design


L2100 Value 10uH Calculated value less than 10uH not recommended in ltc4007 datasheet, but calculated value was.

External Charger

Near end of project the PSAS decided to look into using an external charger given the capabilities of the charger that they had selected, and space on the board.

Looking at power switches and the internal charger design saw use for switch controller and mosfet as they had the range needed, and by using the enable pin to switch, could control via the microcontroller.

Parts Q2114,2115,2116 See Q2104 for specs Used to control flow based on microcontroller signal 2115,2116 used for loads

C2117,2118,2119 See C2107 for details

U2111,2112,2113 See U2101 for specifics Used to control flow based on microcontroller signal

Posted Mon Jan 26 02:05:08 2009

USB Hub Requirements:

  • SHOULD be USB 2.0 compliant High Speed (480 Mbps)
  • MUST handle (8,,) downstream devices (devices may be further hubs)
  • SHOULD have hub status LEDs

USB HUB IC chosen: SMSC USB2517


SMSC-USB2517 Datasheet

Evaluation-Board User Manual:

SMSC-USB2517 Eval Board

Evaluation-Board Schematic (for reference design):

SMSC-USB2517 Eval Board Schematic

Other Miscelaneous Reference Material:

SMSC-USB2517 Misc.

USB 2.0 Specification

USB2517 Basic Functional Description:

  • The SMSC-USB2517 hub controller comes in a 64 pin, 9x9mm QFN package. It is an OEM (Original Equipment Manufacturer) configurable integrated circuit which uses a multi-transaction translator (MTT) and is capable of supporting 7 downstream ports. The hub supports low, full and high speed devices on all of the enabled ports.

  • All required resistors on the downstream ports are integrated into the hub. This includes all series termination resistors on D+ and D- pins and all required pull-up and pull-down resistors on D+ and D- pins. The over-current sense pins for the downstream ports have internal pull-up resistors as well.

  • Some key features of the USB2517 include:

    • low power dissipation, high performance, small footprint
    • Fully compliant with USB 2.0 specification
    • 3 options for hub configurations: I2C (via EEPROM), SMBus, and internal default configurations via strapping options
  • The USB2517 also offers a PortMap flexible port mapping ability, PortSwap which allows programming of USB differential pair pin locations, and PhyBoost which provides programmable USB signal drive strength.

  • For more information about these options follow link to datasheet.

USB Hub Circuit Design:

Pin Connections (For detailed pin descriptions see table 5.2 in USB2517 datasheet)


  • These pins provide one of the two differential USB data signals to downstream ports 1-7
  • each of these pins is connected to the pair of the USB_L pins of the respective power switch port connector
  • Pulling any of these pins, along with the associated USBDP pin, up to 3.3V with a 10kOhm resistor disables the respective port
  • Instead of pullup to 3.3V, we will connect these pins to the ARM giving it control of what ports are enabled


  • This pins proved the other of the two differential USB data signals to downstream ports 1-7
  • Each of these pins is connected to the pair of USB_H pins of the respective power switch port connector
  • Pulling any of these pins, along with the associated USBDM pin, up to 3.3V with a 10kOhm resistor disables the respective port
  • Instead of pullup to 3.3V, we will connect these pins to the ARM giving it control of what ports are enabled


  • There are a total of 7 of these pins, each connected to +3.3V


  • These pins connect to LEDs which are used to indicate both connection status and port speed for each of teh 7 ports.
  • This is done with a combination of a red and a green LED assigned to each port.
  • See section 6.1.2 on page 29 of the USB2517 datasheet for more information
  • Also see LEDs in the component selection

  • These pins also are used to configure the portswapping option, which we are not using. To ensure port polarity swapping does not inadvertently occur, these pins must be low when RESET_N is asserted.


  • These pins connect to amber LEDs which indiccate overcurrent conditions on downstream ports
  • We are not using overcurrent sensing so these pins are not connected


  • These multifunction pins can connect to amber LEDs which indicate overcurrent conditions on downstream ports
  • They are also sampled after RESET_N is asserted to determine the signal strength of the USB differential signals to downstream ports as follows:

    • BOOST[1:0] = '00': Normal signal strength
    • BOOST[1:0] = '01': approximate 4% signal boost
    • BOOST[1:0] = '10': approximate 8% signal boost
    • BOOST[1:0] = '11': approximate 12% signal boost
  • In my current design, the signal strength is set at normal strength so these pins are strapped to ground. However these pins could be connected to the ARM so that signal strength can becontrolled on-line


  • Overcurrent sense input pins. We are not using overcurrent sensing function of hub. Since these pins are pulled up internally, they are treated as no connects.


  • These pins provide power to downstream ports.
  • We are using a seperate power switch network so this pins are treated as no-connects


  • Used by the manufacturer for IC testing. Must be connected to ground


  • VDD core regulator filter capacitor.
  • Datasheet states this pin must be connected to ground through a 0.1uF capacitor


  • This active low pin resets the USB2517 after it is asserted for 1us
  • After this pin is asserted, the configuration pins are sampled to determine how the hub is configured
  • This pin is pulled up to 3.3V with a 10kOhm resistor and will also connect to the ARM so that configuration can be done on-line


  • Detects upstream VBUS power
  • The dtasheet states that in self powered applications, which ours is, this pin must be tied to 3.3V



    • As I understand the datasheet, this function of the pin supports an LED which indicates whether the USB is configured.
    • If asserted, the hub is configured and USB is active
    • If negated, hub is unconfigured or configured and in USB suspend
    • The active state of the LED is determined by the values of NON-REM[0] and NON-REM[1] (see below)

    • Detects availability of local power source
    • Low = Self/local power source is NOT available (Hub is powered only with VBUS power)
    • High = Self/local power source is available
  • NON-REM[0]

    • This is a configuration strap option
    • For this function, this pin along with NON-REM[1] is sampled at assertion of RESET-N to determine which, if any, of the downstream devices are removeable
    • Which ports are removeable is determined as follows using NON-REM[0] and NON-REM[1]:
      • NON-REM[1:0] = '00': All ports removeable, Suspend indicator LED active high
      • NON-REM[1:0] = '01': Port 1 is non-removeable, Suspend indicator LED active low
      • NON-REM[1:0] = '10': Ports 1 and 2 are non-removeable and LED is active high
      • NON-REM[1:0] = '11': Ports 1, 2 and 3 are non-removeable and LED active low
  • LOCAL-PWR and NON-REM[0] seem to be contradictory for our purposes. At this point I have this pin permanently tied to ground along with NON-REM[1] so that the hub is permanently configured for removeable devices on all ports. However doing this would then tell the hub that self/local power is NOT available. My thought is that this pin will need a weak pullup and also be connected to the ARM which can drive the pin low at assertion of RESET-N. This way, the hub will be configured with all removeable devices and still detect local power, which is all we are using.


  • Another multifunction pin used for hub configuration

  • SDA

    • Serial data signal

    • Server message block data signal
  • NON-REM[1]

    • Used in conjunction with NON-REM[0] to determine which, if any devices attached to the downstream ports are removeable. See NON-REM[0] description for explanation


  • A multifunction pin used in hub configuration

  • SCL

    • Serial clock signal

    • System management bus clock signal
  • CFG-SEL[0]

    • Sampled at RESET-N assertion in conjunction with CFG-SEL[1] and CFG-SEL[2] to determine which internal default configuration of the hub is used. See CFG-SEL[2] description for further explanation of these options
  • I am assuming that we are not using a serial clock signal or system management bus clock so these signals are not used in the hub circuit at this time


  • Another multifunction pin used in hub configuration

  • HS-IND:

    • The pin can support an LED which indicates whether the hub is connected at high speed
    • Asserted = hub connected at high speed
    • Negated = hub is connected at full speed
  • CFG-SEL[1]

    • Sampled at RESET-N assertion in conjunction with CFG-SEL[0] and CFG-SEL[2] to determine which internal default configuration of the hub is used. See CFG-SEL[2] description for further explanation of these options
    • If CFG-SEL[1] = '0': HS-IND is active high
    • If CFG-SEL[1] = '1': HS-IND is active low


  • Sampled at RESET-N assertion in conjunction with CFG-SEL[0] and CFG-SEL[1] to determine which internal default configuration of the hub is used.

  • See table 8.2 on pages 33 and 34 of USB2517 datasheet for the different default configuration options which can be set using CFG-SEL[2:0]

  • For our design CFG-SEL[2:0] = '000' which means the following:

    • Strap options enabled
    • Self-power option enabled
    • LED mode = speed
    • Individual power switching
    • individual over-current sensing


  • One of 2 signals of the differential USB data signal from an upstream device
  • This pin is connected to the USB-H pins on the connector to the flight computer (J2007)


  • The second signal of the differential USB data signal from an upstream device
  • This pin is connected to the USB-L pins on the connector to the flight computer (J2007)


  • Connects to one terminal of the 24MHz external crystal


  • Connects to the other terminal of the external 24MHz crystal


  • PLL regulator filter capacitor
  • As the datasheet directs, this pin is connected to ground through a 1.0uF capacitor


  • This pin sets the USB tranceiver bias
  • As the datasheet directs, this pin connects to a 12kOhm resistor to ground (R2065)

Component Selection:

Integrated Circuits:


  • SMSC_USB2517 USB hub chip
  • See above for explanations



  • 1MOhm filter resistor for external clock
  • This resistor was included in the circuit based on the smsc reference design. Not sure if this is needed


  • 12kOhm bias resistor sets the internal bias of the hub chip
  • 2517 datasheet specifies this value of resistor on RBIAS pin
  • See RBIAS pin description for more information


  • 10kOhm pullup resistor connected to the RESET-N pin
  • This pullup to 3.3V ensures the USB hub reset function is negated unless asserted by the ARM


  • 10kOhm pulldown resistors for CFG-SEL[2:0] pins
  • This ensures that the default configuration scheme of the usb hub will be CFG-SEL[2:0] = '000'
  • See CFG-SEL[2] pin description for explanation of settings associated with this configuration
  • These pins are also connected to GPIO pins of the ARM so that the HUB can be re-configured by the micro-controller if so desired

R2070, R2071

  • These resistors are attached to multifunctional pins on the hub
  • R2070 is a 10kOhm pull-down resistor ensuring that NON-REM[1] has a default logic low level (We are not using the other functions associated with this pin. This pin is also conected to a GPIO of the ARM so that other options can be used if needed
  • R2071 is a 10kOhm pull-up resistor to ensure that SUSP-IND/LOCAL-PWR/NON-REM[0] pin has a default logic high level

    • In the event that the HUB is reset, this pin will generally need to be driven low by the ARM along with NON_REM[1] to ensure that all 7 of the HUB's downstream ports are configured to support removeable devices. This configuration can be changed if need be as both pins are connected to GPIO pins of the ARM
    • The pull-up is necessary because of the fact that a logic high is needed on this pin to tell the HUB that a local power source is present. If this is not a logic high, the HUB will think that all power is provided from the VBUS which we do not implement
    • If the ARM should fail to drive this pin low upon a reset, port 1 will be considered a non-removeable port. This should not pose too much of a problem as the hub can be re-configured at any time.

R2072, R2073

  • 10kOhm pull-down resistors connected to the BOOST[1:0] pins
  • The pull-downs ensure that the default setting of the HUB's signal strength for downstream ports will be 'no-boost'
  • These pins also connect to GPIO pins of the ARM so that the HUB can be reconfigured for signal boost if needed
  • See BOOST[1:0] pin descriptions for more information


  • 330 Ohm current limiting resistors to protect the LED port status indicators
  • This value is questionable as the design uses 0605 LEDs and I'm not sure if such a small resistor provides enough protection.



  • 33pF bypass capacitors connected to the terminals of the external 24MHz clock
  • These values were chosen based on the 2517 datasheet reference design


  • 1uF capacitor connected from PLLFILT pin to ground, acts as a filter capacitor for the HUB's internal PLL
  • This capacitor value is specified in the datasheet


  • 0.1uF VDD core regulator filter capacitor, connectes from CRFILT pin to ground
  • This value is specified in the 2517 datasheet


  • 0.1uF bypass capacitors to filter high frequency noise on the 7 VDD pins



  • Green LED status indicators indicating the status of the 7 downstream ports
  • These indicators provide downstream port connection status and work in conjunction with red LEDs (LED2015-LED2021) to indicate connection speed
  • See LED2015-LED2021 description for more information about connection speed indication, also see section 6.1 in 2517 datasheet for detailed description of LED functionality
  • The green status LEDs function in accordance with section 11.5.3 of USB 2.0 specification


  • Red LEDs which work in conjunction with green LEDs (LED2008-LED2014) to indicate speed of the devices attached to the 7 downstream ports
  • These and the green LEDs are connected to the LED-A-N[7:1] pins in such a way that they function as follows:
    • When any of the pins is driven to a logic low, the corresponding green LED will light up which indicates that a lowspeed device is attached to the respective port
    • When any of the pins is driven to a logic high, the corresponding red LED will light up indicating that a full speed device is attached to the respective port
    • When any of the pins outputs a 1kHz square wave, both LEDs will be pulsed on and off. The datasheet notes that the green/red LEDs should be in a single package so that this condition will result in an orange color, however we are using seperate 0605 LEDs so it will simply appear as both the red and green LEDs are on. This indicates that a high speed device is attached to the respective downstream port
    • When nothing is driven out on an LED-A-N pin, the pin floats to a "tri-state" condition and neither of the LEDs light up. This indicates that the respective port is either disabled or nothing is attached



  • This diode ensures that when any of the LED-A-N pins float to a tri-state condition, the LEDs do not light up, correctly inicating the respective downstream is disabled or nothing is connected



  • External 24MHz external crystal which provides the clock signal to the USB hub

Posted Mon Jan 26 02:05:08 2009


  • MUST seamlessly shift between shore power and battery power
  • MUST be able to detect the presence of shore power
  • MUST wake up APS microcontroller if shore power turned on
  • MUST be able to sense if connector is inserted or removed (launch detect)

Some Design Considerations:

  • If we are using the LTC4007 for the charger chip, we require an Ideal_Diode

    • This is essentially a FET with a controller
    • FET requires very low Rds_on since it is in the main power path
    • Controller must meet thermal requirements so as not to cook the power path controller during operation
    • Also needs to handle all stresses that may be encountered during operation

Ideal Diode Transistors:

  • After discussing with Andrew and Tim, the Si4422DY will measure up to our requirements:


  • Datasheet: Si4422DY
  • Rds_on = 4.5mOhm
  • If we design for 10A
    • P = I^2R = 100 x 4.5x10^-3 = 0.45W

Ideal Dioide Controllers:

  • Need to handle 30+Volts
  • 10A current capability
  • fast switching

LTC4357 (Chosen)

  • Datasheet: LTC4357
  • V range = 9-80V
  • Operating current capability 20A
  • t-off = 300-500ns
  • DFN Package

LTC4412 (In use on current APS)

  • Datasheet: LTC4412
  • V range = 2.5-28V
  • Current Capability 5A (Not enough)


  • More "rugged" version of the LTC4412
  • has a larger max Vin, but still suffers from the 5A current limitation
  • Datasheet: LTC4412HV


  • As can be seen in the LTC4357 datasheet, the IC's IN pin connects to the source of the FET. The source then becomes the anode of the ideal diode. The OUT pin connects to the FET's drain which acts as the ideal diode's cathode. The LTC4357 then detects the voltages at each pin and the gate pin then drives the gate of the FET to maintain the forward drop at 25mV. If the voltage accross IN to OUT becomes more negative than -25mV, the gate of the FET is pulled low with a strong pull down. This would occur in the event that shore power is present.

Component Selection:

Integrated Circuits:


  • Ideal diode controller. See above for functionality



  • Functions as the ideal diode. See above for functionality



  • 10kOhm Pull down for launch detect



  • 39uF bypass capacitor. This value is recommended in the datasheet

C2108, C2109

  • 100nF bypass capacitors



  • Shore power connector. Will be updated when Dave has an actual connector. As it stands now this is just an arbitrary 5-pin connector with the followibng connections:

    • RCKT_RDY

      • Connects to the ARM which provides the flight computer with the signal indicating the rocket is ready for launch
    • SH_TX

      • Transmit signal from shore power, this signal will connect to RX of the ARM. In the event of launch, the shore power umbilical will pull out of the connector and this signal will be pulled low by R2119 indicating to the ARM that launch has occurred.
    • SH_RX

      • Recieve signal to shore power, connects to TX of ARM
    • SH_GND

      • Shore power ground
    • SH_POWER

      • Main power from umbilical
Posted Mon Jan 26 02:05:08 2009


The specifications the APS power switches are required to meet are as follows:

  • Power Switches
    • MUST have (8,,) independent resettable electronic circuit breakers with adjustable current trip and trip delay. Setting can be via resistor strap, EEPROM, etc. Current trip should be latch-off or selectable.
    • MUST have Soft on/off feature
    • MUST have no mechanical switches in main power path.
    • MUST indicate power switch on/off state (LED for human, and electrical signal for APS node)
    • MAY indicate power switch fault state
    • MUST operate continuously within 20% of the over-current set point
    • MUST allow set currents in the range (0.1, 5)A
    • MUST allow over current transients of 100% for minimum 100 ms without fault to the load

Chosen Integrated Circuits:

  • The design of the APS power switches will be similar to those used in the LV2b APS in that they will each consist of an external FET combined with a controller IC. This is mainly because of the fact that this form of switch is very robust and reliable and still offers a great deal of control over the various parameters in order to meet the specs. Aside from the ability to meet above specs, some major considerations when choosing components were:

  • Larger supply voltage (designing for 20V or greater, max for old controller was 18V)

  • High side switch (reacts to fault at high rather than low side of switch)
  • Require FET which has a low Rds-on which is ideal in that we want the FET to resemble a wire as closely as possible when on
  • Simpler design requiring less external components

Switch Controller IC (TPS2490)

  • The IC chosen as the controller is the TPS2490 Postitive High-Voltge Power-Limiting Hotswap Controller by Texas Instruments. Click below to view this item's datasheet.

Controller Datasheet

TPS2490 datasheet

Initial reasons for choosing TPS2490:

  • Wide operating voltage (+9V to +80)
  • Under voltage lockout feature
  • Simpler reference design than LTC1154 (used on LV2b APS)
  • MSOP package
  • Programmable fault timer
  • Programmable power limit to limit dissipation in FET

N-Channel MOSFET transistor (Si4122DY)

  • The transistor choice was based on a large Vds range, small Rds-on, and relatively small package size. The FET chosen is the Vishay Si4122DY N-channel MOSFET which is rated at a max Vds of 40V and and Rds-on of 4.5mOhm at a Vgs of 10V.

FET Datasheet

Si4122DY datasheet

Power Switch Design

TPS2490 Pin Descriptions:

  • The following pin descriptions were taken from the datasheet. For a more in depth description, see pages 9 and 10.


This pin serves 3 functions (See Function Descriptions for explanations of specific functions):

  1. biasing power to the controller IC
  2. Input to power on reset (POR) and under voltage lockout functions (UVLO)
  3. Voltage sense at one of the terminals of sense resistor Rs (See Typical Application diagram on page 1 of datasheet)


Connects to downstream terminal of sense resistor Rs. This pin monitors the voltage at the FET drain (refered to as M1 in datasheet) and Rs terminal to provide feedback to the controller's constant power limiting engine (see Function Descriptions) as to M1 current (Id) and voltage (Vds). Id is calculated using voltage difference between VCC and SENSE pins divided by the value of sense resistor Rs. Vds is calculated with the difference between voltages on SENSE and OUT pins.


Provides the high side gate drive for the FET M1. This pin is controlled by the internal gate drive amplifier which provides a pullup of 22uA from an internal charge pump and a strong pulldown to ground of 75mA. Pull-down current is a non-linear function of the amplifier overdrive providing small overdrive for small overloads, and large overdrive fro fast reaction to output shorts. This pin also employs a seperate 2mA pull-down to shut off transistor M1 when voltage on EN pin, or UVLO conditions cause this to happen.


This pin is used by the constant power engine and PG comparator to measure Vds of M1 transistor. Internal protection circuits leak a small current from this pin when it is low.


The TPS2490 gate drive is enabled if the positive threshold is exceeded and internal POR and UVLO thresholds have been satisfied. If the IC is latched off, it can be reset by cycling the EN pin below the negative threshold and then back high. The voltage thresholds for this pin are as follows:

  • V-EN-High: typical 1.35V
  • V-EN-Low: typical 1.25V


Provides a 4V reference voltage for use in setting the voltage on the PROG pin. This voltage is available once the POR and UVLO thresholds have been satisfied. This pin supplies no more than 1mA of current.


The voltage applied to this pin programs the power limit used by the constant power engine. The voltage on this pin is set using a resistor divider circuit on the VREF pin.


An integrating capacitor, Ct in reference design, connected to this pin provides a timing function that controlls the fault time. The TIMER pin charges the capacitor with a 25uA current whenever the TPS2490 is in power limit or current limit, and discharges at 2.5uA otherwise. If the voltage on the TIMER pin reaches 4V, the controller pulls the gate to ground, latches off, and discharges capacitor Ct.


This open-drain output is intended to interface to downstream dc/dc converters or monitoring circuits. PG pin goes open drain (high-voltage with pull-up) after Vds of FET M1 has fallen to about 1.25V and a 9ms deglitch time has passed. PG is false (low) when EN is false, Vds is above 2.5V, or UVLO is active.


This pin is connected to system ground

TPS2490 Functional Descriptions:

APS Power Switch Basic Functional Description

The power switch network employed on the LV2c APS node consists of 7 power switches which provide overcurrent protection for 7 downstream devices. An 8th switch is also employed which provides the same protection for the upstream flight computer. Under normal operation the external N-Channel MOSFET is turned on via the TPS2490 gate drive and power is supplied to peripheral devices through a 16 pin connector. The remaining pins on the connector are used for differential USB and CAN data signals as well as auxilliary pins for direct board to board connections. Each switch is designed for a maximum current limit of 5A along with an allowable 100% (10A) inrush limit which the switch will allow for 100ms without fault to the attached device. Each switch uses a logic enable which is connected to the ARM micro-controller to give full control over which devices are powered. The PG (power good) pin of each switch is also connected to the ARM to indicate the on/off status of each switch.

Under Voltage Lockout (UVLO)

This function will disable the switches in the event of a hard short on the main power path. The switches will latch off if the voltage on VCC reaches or falls below 8.3V.

Constant Power Engine

This function monitors the power dissipation in the external MOSFET for the main purpose of limiting rise in the junction temperature of the FET. Thermal ratings of the FET are used to determine the value of maximum power dissipation allowable. From the datasheet description, this function generally applies to startup conditions as this is when the FET will experience inrush over-currents and run the risk of exceeding its physical limitations. This, in turn, can result in not only damage or destruction of the FET, but damage or destruction of the attached device as well. The constant power engine varies the transistor current, Id, as the voltage, Vds, changes in order to ensure that power dissipation remains constant at the programmed value. As stated, the actual power limit value is determined using thermal parameters of the FET used in the design in the following equation:

Plim <= 0.7 x (Tjmax2 - [(I^2max x Rdson x Rthca) + Tamax])/Rthjc


  • Rthjc = FET junction to case thermal resistance (42 degC/W)
  • Tjmax2 = short term max die temp. of FET, can be set at 150C if max rating is 175C, since Si4122DY max is 150C, we'll set this to 150C - 25C = 125C
  • Rdson is the FET ds on resistance at max operating temp. of about 80C. This value is 4.5mOhm
  • 0.7 represents the tolerance of the constant power engine
  • Rthca = the max case to ambient thermal resistance; equal to Rthja - Rthjc = 21degC/W
  • I^2max = the square of the max drain current, Id, allowed (5A) = 25
  • Tamax = maximum ambient temperature (assuming around 70C)

Using the above equation and the given values:

Plim <= 1.755W

This value can then be programmed into the TPS2490 by applying the voltage to PROG pin which satisfies the following equation given in the datasheet:

VPROG = Plim/(10xIlim)

This equation is derived from the fact that the constant power engine has an output clamped to 50mV according to:


Solving for VPROG:

VPROG = 0.05V x [2x(VSENSE-VOUT)] = 0.1 x (VSENSE - VOUT)

Since Plim = Ilim x Vds = Ilim x (VSENSE - VOUT):

VPROG = [0.1 x Ilim x (VSENSE - VOUT)]/Ilim = Plim/(10xIlim)

The calculated VPROG is applied to the PROG pin using a resistor divider circuit in conjunction with VREF. See conponent selection for resistor values and calculations.

At startup we can assume that Vds = VCC. The initial current through the FET, Id-allowed, is then determined by the set power limit according to:

Id-allowed = Plim/VCC

After stepping to this initial value of Id-allowed, Vds falls and Id is allowed to increase in such a way as to ensure that Plim remains constant. This happens because the power limiting engine adjusts the current limit reference to the gate amplifier thus controlling the transition of the FET from off to fully on, and allowing the transients to pass before it reaches the fully-on state. In non-startup overcurrent conditions, power limiting is assumed to be achieved in a similar fashion. In this situation the volatge at VSENSE will increase due to the rise in current through sense resistor Rs and Id-allowed will be adjusted to ensure that the power dissipation remains constant according to the set limit.

TIMER Operation

In the event that the power limiting engine is activated, a 25uA current is supplied be the TIMER pin to charge the capacitor Ct. Once the capacitor's charge reaches 4V, the FET is turned off and the TPS2490 latches off. The switch then must be reset by cycling the EN pin. See C2000 - C2007 in the component selection for calculation of the capacitor values.


In the description of the constant power limiting engine, it is mentioned that at startup there is a small stepup in Id-allowed to satisfy the power limiting engine. This initial step up in current could pose a potential problem depending on its magnitude. As such, the switch can be designed with a capacitor added to the PROG pin to employ a soft-start function which converts this step into a ramp. The value of the capacitor would then determine the slope of teh ramp. See C2008-C2015 in component selection for more info.

dV/dt Control

The TPS2490 provides the option of dV/dt control in applications which require constant turn on currents for the FET. This is achieved through the addition of a resistor in series with a capacitor connected from the GATE pin to ground. See C2016-C2023 and R2048-R2055 in component selection.

APS Power-Switch Component Selection

Integrated Circuits:

U2000 - U2007

  • Texas Instruments TPS2490 Positive High-Voltage Power-Limiting Hotswap Controller
  • This IC acts as the controller which determines whether or not the external FET is on/off based on several parameters. See above for in depth description of IC functions


Q2000 - Q2007

  • Vishay Si4122DY N-Channel MOSFET
  • These transistors are used in conjunction with the TPS2490 as described above


J2000 - J2007

  • Modified JST-16PS-JED 16-pin Connector.
  • These connectors are used to connect the 7 downstream devices and Flight-Computer to the power switches. The connectors are modified in that they have added "blocks" which allow the plugs from the external devices to be screwed into place, similar to the connection between monitor and computer of a desktop unit
  • The pins of each connector are doubled up for redundancy and pin descriptions for each connector are as follows:
    • 2 pins - positive battery power/shore power, connected to the output of the FET on each switch
    • 2 pins - battery ground/shore ground
    • 2 pins - CAN-H; high level of differential CAN data signal
    • 2 pins - CAN-L; low level of differential CAN data signal
    • 2 pins - USB-H; high level of differential USB data signal
    • 2 pins - USB-L; low level of differential USB data signal
    • 2 pins - AUX-1; available for optional board to board connections
    • 2 pins - AUX-2; available for optional board to board connections


LED2000 - LED2007

  • Green LEDs, 0805 package, used to indicate on/off state of the power switches


R2000 - R2007

  • These resistors are the sense resistors (Rs as refered to in datasheet) used to set the current limit, Ilim, allowed through the FET

  • VCC and SENSE pins are connected to the terminals of these resistors and the TPS2490 computes the voltage VCC - VSENSE. This voltage drop is compared internally to a 50mV threshold voltage via an internal comparator. If the voltage exceeds the 50mV threshold, an overcurrent condition exists and the TPS2490 begins limiting action.

  • The value of these resistors is calculated as follows:

    R = 0.05V/(1.2 x Ilim)

    Where the factor of 1.2 ensures a 20% operating current tolerance

  • With Ilim = 5A:

R = 0.05V/(1.2 x 5) = 8.33mOhm

R2008 - R2015

  • Gate resistors used to minimize noize on the gate drive of each switch
  • It is recommended in the TPS2490 datasheet that if Ciss of the MOSFET > 200pF, a 10 Ohm resistor should be used, otherwise this should be 33Ohm
  • Ciss of the Si4122DY = 4200pF so these resistors will be 10 Ohm

R2016 - R2023

  • The top resistor in the resistor divider circuit used in conjuction with the 4V reference voltage at VREF to set the voltage on the PROG pin and thus program the power limit for the constant power engine.
  • Datasheet notes this resistor can be 4kOhm or greater but it is recommended that 10kOhm or greater be used so these resistors will be 10kOhm

R2024 - R2031

  • The bottom resistor for the voltage divider circuit used in conjunction with the 4V reference voltage ate VREF to set the voltage on the PROG pin and program the power limit for the constant power engine
  • With the power limit, Plim, already calculated to be 1.755W (see constant power limit engine description) the voltage needed at PROG pin can be calculated:

Vprog = Plim/(10 x Ilim,max) = 1.755/(10 x (1.2x5)) = 0.02925V

  • With the top resistor value set at 10kOhm, the value of these resistors can be calculated by solving the following equation for R:

Vprog = Vref(R/(10k + R))

  • Solving for R we obtain:

R = 73.664Ohm

  • If we set these resistors at 75Ohm, Vprog becomes 0.02977V making Plim 1.79W which is an increase of only about 0.04W and doesn't seem as though it would present a problem

R2032 - R2039

  • 10kOhm pull down resistors for the logic enable function of TPS2490
  • In the event that the micro-controller malfunctions or for some reason does not turn on the TPS2490, this pull down ensures that the switch will be latched off

R2040 - R2047

  • 10kOhm pullup resistors for the power good (PG) pin.
  • Since PG is open - drain when 'true', the pullup ensures that PG goes high after Vds falls below 1.25V and a 9ms deglitch time has elapsed

R2048 - R2055

  • These resistors are place holders in case the dV/dt control function is needed. At this point they are not placed

R2056 - R2063

  • These resistors are current limit resistors to ensure LEDs don't burn up during operation.
  • 5kOhm seems to be a reasonable value


C2000 - C2007

  • Timeout capacitors connected to the TIMER pin of the TPS2490 (Ct in the datasheet)
  • These capacitors control the amount of time a fault is allowed before latch off
  • The spec calls for a 100ms time delay
  • It is given that during a fault, this capacitor is charged to 4V with a 25uA current before latch-off occurs, thus we can solve for the capacitor values as follows:

I = C(dV/dt)

  • Where:

I = 25uA

dV/dt = 4V/100ms

  • Thus:

C = I/(dV/dt) = 25uA/(4V/100ms) = 0.625uF

C2008 - C2015

  • These capacitors are placeholders in case the soft start function is required (see function descriptions above)
  • In this design, soft-start is not used so these capacitors are not placed

C2016 - C2023

  • These capacitors are placeholders in the case that the optional dV/dt function is needed (see function description above)
  • In this design we are not using the dV/dt function so these capacitors are not placed

C2024 - C2031

  • 0.1uF bypass capacitors which act to eliminate high frequency glitches on VCC pin of TPS2490

C2032, C2033

  • 0.1uF bypass capacitors to eliminate high frequency glitches between main power and main ground

C2044 - C2051

  • 0.1uF ESD protection capacitors for the 16 pin connectors
Posted Mon Jan 26 02:05:08 2009

future spec

Posted Mon Jan 26 02:05:08 2009